1. Field of the Invention
The present invention relates to a semiconductor memory device and, particularly, to a semiconductor memory device including a current driver that causes bi-directional current to flow through a data write line to write data into a memory cell.
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) has been attracting attention as a non-volatile memory device with low power consumption. An MRAM is a memory device in which non-volatile data storage is realized by using a plurality of thin film magnetic bodies and each of the thin film magnetic bodies can be accessed at random.
Recently, it has been reported that MRAM performance can remarkably be improved by using a thin film magnetic body utilizing magnetic tunnel junction (MTJ) as a memory cell. MRAMs including memory cells having the magnetic tunnel junction are disclosed in “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell,” ISSCC Digest of Technical Papers, TA7. 2, Feb. 2000, “Nonvolatile RAM based on Magnetic Tunnel Junction Elements,” ISSCC Digest of Technical Papers, TA7. 3, Feb. 2000, and “A 256 kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM,” ISSCC Digest of Technical Papers, TA7. 6, Feb. 2001.
In an MRAM including memory cells having magnetic tunnel junction (hereinafter also simply referred to as “MTJ memory cells”), at the time of data writing, a current is caused to flow through a selected bit line in a direction in accordance with the write data, and a non-selected bit line is kept in a floating state, by a current driver operating with a prescribed power supply voltage supplied thereto. As a prescribed amount of current flows through the selected bit line, a direction of magnetization of a ferromagnetic layer referred to as a free magnetization layer changes in the memory cell to which data is to be written (hereinafter also referred to as a “selected memory cell”). Utilizing the change in resistance resulting from the change in the internal state, data is stored in non-volatile manner in the memory cell.
When data is to be written to an MRAM, it is necessary to cause current to flow bi-directionally, that is, in two directions, through the bit lines, as described above. Therefore, in a conventional MRAM, current drivers each including a charging P-channel MOS transistor and a discharging N-channel MOS transistor are arranged at opposite ends of each bit line, and a current is caused to flow from one current driver to the other current driver in accordance with the write data, to realize data writing to the memory cell.
Here, in order to attain the same current drivability in the P-channel and N-channel MOS transistors, the P-channel MOS transistor is generally becomes larger than the N-channel MOS transistor. Japanese Patent Laying-Open No. 2002-093144 discloses a current driver having a small area, including an N-channel MOS transistor and a current source connected in series with the transistor.
There has been a stronger demand for smaller size semiconductor memory devices, as portable electronic devices are increasing. In a semiconductor memory device in which data is written to a memory cell by causing currents to flow bi-directionally through the bit lines as in the case of an MRAM, generally, each bit line has current drivers arranged at opposite ends, and therefore, a large area is occupied by the current drivers. Therefore, in such a semiconductor memory device as represented by the MRAM, decrease in the area of current drivers has been desired.
Further, as smaller energy consumption has also been desired recently, not only the size but also the power consumption of the semiconductor device should be decreased. Power consumption is in proportion to the square of power supply voltage, and therefore, it is effective to lower the power supply voltage to decrease power consumption.
In the conventional MRAM described above, in a current path from a power supply on a higher potential side connected to a current driver at one end of a bit line to a power supply on a lower potential side connected to a current driver at the other end of the bit line, there are two MOS transistors inserted in series. Specifically, from the power source on the higher potential side connected to one current driver, a current for data writing flows to the bit line through the P-channel MOS transistor, and the current for data writing flows to the power supply on the lower potential side through the N-channel transistor of the current driver connected to the other end of the bit line.
Therefore, in the conventional MRAM, the resistance of the entire current path increases because of the on-resistance of these two transistors, and therefore, the power supply potential must be relatively high, in order to cause a prescribed current for data writing to flow through the bit line. Thus, decrease of the power supply voltage has been limited in the conventional MRAM having current drivers of such a configuration, and as a result, it has been difficult to further reduce power consumption.
The current driver of the MRAM described in Japanese Patent Laying-Open No. 2002-093144 realizes a small area and contributes to reduction in device size. The current path, however, still has two MOS transistors (N-channel MOS transistors) inserted in series. Therefore, even by this current driver, the above-described problems cannot be solved.